Any Hope of ever modding?

Trying to further the development of the Android on the Revue? Talk about it hear and document it on the wiki: http://www.wiki.gtvhacker.com

Moderator: Revue Mod

nikescar
Android 1.0
Posts: 11
Joined: Tue Jan 17, 2012 12:53 pm
GTV Device Owned: Logitech Revue

Re: Any Hope of ever modding?

Post by nikescar » Fri Mar 09, 2012 4:24 am

3.Intel atom SDK or CEFDK bootloader. source : http://www.2shared.com/file/fN_xusWK/ce ... 610161.htm

3-1.gen4.bin

Code: Select all

04/08/10 16:55:23
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Verify stage2 PASS
Verify stage2 FAIL
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Unable to Verify stage 3 kernel RSA Signature
Unable to Verify stage 3 RAMdisk RSA Signature
Verify stage 3 pass, try secure boot to Linux from NOR Flash ...
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,:Intel Lincroft SCH Microcode Version 000.064d:00000000:Apr 28 2009
:10:46:28
;ASTEP=def;
LGI_POWER_OVER_RIDE=def;
ENABLE_DDR_RCOMP=def;
USE_DRAM_RDY=def;
CSTATE_TIMINGS=undef;
DPSLP_INVERSION=undef;
LAB_DEBUG_MESSAGES=undef;
ENABLE_DDR_RCOMP=def;
CSTATE_TIMINGS=undef;
CLK_RATIO_12_TO_1=undef;
CEFDK - Production Release %s
  core                      : %s
  cs_gen4                   : %s
  MemType                   : DDR2 
  MemType                   : DDR3 
  MemSpeed                  : 800
  MemSpeed                  : 1066
  MemSpeed                  : 1333
  MemSpeed                  : 1600
  MemSpeed                  : Unknown
  Channels Enabled          : 
  Channel Mode              : 
Hit a key to start the shell...
    fuse_idcode_version[4:0]          -  %04yb
    fuse_sku_id[6:0]                  -  %06yb
    fuse_device_serial_number1[31:0]  -  0x%08X
    fuse_device_serial_number2[31:0]  -  0x%08X
    fuse_ca_vendor_config[15:8]       -  0x%02X
    fuse_ca_vendor_config[7:0]        -  0x%02X
WARNING: The part you are using is UNFUSED and cannot boot!
Please have your Unfused part swapped with a Fused part
by the CE4100 Boards Ops Team ASAP!
CPU Frequency        : %d MHz
Attempting to boot Linux from NOR ...
Kernel not found at 0x%X in NOR, continue booting from HD.
Attempting to boot Linux from NAND ...
DENALI_FTL_Page_Read FAIL at 0x%X.
Kernel not found at 0x%X block in NAND, continue booting Linux from HD.
Attempting to boot Linux from HD ...
Kernel not found at 0x%X sector in hard disk, continue booting from flash.
Attempting to boot Redboot from NOR flash ...
Attempting to boot Redboot from NAND flash ...
FTL Lite read Redboot from blk %d fail.
Attempting to boot Redboot from hard disk ...
console=ttyS0,115200 root=/dev/mtdblock2 rw mem=exactmap [email protected] [email protected]
console=ttyS0,115200 root=/dev/sda2 rw mem=exactmap [email protected] [email protected]
CE4100 Stepping: 
Unknown revision
Board:  GoldenBeach: 
Board:  ChesapeakeBay 
Board:  FalconFalls 
Board:  PowerHouseLake 
Version Information - 
Memory configuration - 
Linear
Interleave Mode 1
Interleave Mode 2
All A/V devices use IRQ 4.
Fuse bits:
FTL Lite initialized failed
Shell exit
Please restart the board
CE4100 4.018
bad reg address
bad dev address
success
not initialized
bad op type
tx empty timeout
rx full timeout
unknown error %d
!!! I2C WR: *%08x=%08x
!!! *retData=0x%x
I2CWaitRxFull
I2CWaitTxEmpty
!!! IN %s: stop=%d ISR=0x%08x mask=%08x rwm=%08x
!!! EXIT(%d) %s: count=%d ISR=0x%08x mask=%08x rwm=%08x
!!! EXIT(%d) %s: count=%d ISR=0x%08x mask=%08x rwm=%08x toTick=%08x%08x roll=%08x%08x procTicks=%08x%08x
!!! IN %s: stop=%d op=%d ISR=0x%08x mask=%08x rwm=%08x
Usage:
i2c 0|1|2 <I2C dev 7bit addr> [<PCI bus> <dev> <fun>]
i2c r[ead] [<bytes> [<dest addr>]] | w[rite] <byte value> [<val2> <val3> ...]]
i2c w 0x4 1 0 0 0xff 0 0 0 0 0 0 0 0
i2c r
Error: First do: %s <bus> <dev addr>
Bad arg.
Usage: i2c r[ead] [<bytes> [<buffer addr>]]
Bad arg.
Usage: i2c w[rite] <byte value> [<val2> <val3> ...]
I2C buses read and write (SV ver).
i2c d[ebug]
 [<debug msg level: 0|1|2>]
Example:
i2c 2 0x44
STATUS:
I2C Bus: %s
%d (0x%x)
I2C Dev: %s
PCI: 0x%x.%x.%x
Bad byte count %d need >0
0x%02x%s
I2C error: %s (%d)
Read %d bytes
I2C DEBUG @ %d
BAR%d:	%08X
ICR_%d		%08X
ISR_%d		%08X
(ISAR_%d		%08X)
IDBR_%d		%08X
(ICCR_%d		%08X)
IBMR_%d		%08X
IWCR_%d		%08X
ISMSCR_%d	%08X
ISMLCR_%d	%08X
IFMSCR_%d	%08X
IFMLCR_%d	%08X
IDDS_RATE_LB%d	%08X
IDDS_RATE_UB%d	%08X
Unknown arg.
writeCount = 0x%X
Done
Erasing block at 0x%x
Data = 0x%08X
Rounding up copy size to an erase boundary.. Copy Size = 0x%x
Burning the flash using the write buffer
bootkernel
Usage: bootkernel.
root=/dev/ram
Boot Linux kernel from NAND flash block %d...
DENALI_FTL_Page_Read FAIL at 0x%X.
Error booting Linux: Invalid or missing kernel at block 0x%X.
Error booting Linux: Invalid or missing initrd.
Boot Linux kernel from NAND flash.
console=ttyS0,115200 root=/dev/ram0 mem=exactmap [email protected]
mmap
Displays a system memory map.
ata-map
Usage: ata-map none|lba
none
Sets the ATA geometry mapping.
bootata
Attempting ATA boot...
Boots from the primary master ATA device.
Invalid or missing initrd.
mem=
bootlinux
Linux command line = '%s'
Attempting to boot Linux from flash...
Error booting Linux: Invalid or missing kernel at 0x%08X.
Error booting Linux: Invalid or missing initrd.
Boots linux from flash. Usage: bootlinux "<kernel cmd line>"
Error: No room in IRQ table to add entry for device %02x:%02x:%02x
pciIsBridge(bus, dev, func)
pci_alloc.c
Assert failed at %s:%d (%s)
Error: Link %d for PCI device %X:%X:%X exceeds maximum (%d)
Intel(R) Consumer Electronics Firmware Development Kit (Intel(R) CEFDK)
Copyright (C) 1999-2010 Intel Corporation. All rights reserved.
Build Time (%s).
04/08/10 16:55:11
{%x}
exit
help
%10s - %s
reset
shell> 
Error: Missing ".
Error: Invalid command.
Displays this screen.
Stops the shell.
Error: Unable to open redirection file: '%s'.
Invalid %s: '%s'
lspci : displays info about all PCI devices
 -p : pauses after every 25 lines
 -l : list all devices on [bus/buses]
 -s : dump configuration space of [bus [device [function]]] MAXREGOFFSET 
16550-Compatible Serial Controller
Generic PCI Hot-Plug Controller
IPMI Keyboard Controller Interface
Data Acquisition/Signal Processing
BB:DD:FF  VID :DID   DevClass  IRQ  Device Type
--------  ----:----  --------  ---  -------------------------------
===============================================
Bus : %x   Device : %x   Function :  %x
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
Options:
 -h : prints this message
 -v : verbose mode
IDE Controller
SATA Controller
Mass Storage Controller
Ethernet Controller
VGA-compatible Controller
Display Controller
Video Device
Audio Device
Hi-Definition Audio Device
Multimedia Device
Host-PCI Bridge
PCI-ISA Bridge
PCI-PCI Bridge
PCI-CardBus Bridge
Modem Controller
Smart Card Controller
IO(x) APIC
SDIO Controller
System Peripheral
USB Controller (UHCI)
SMBus Controller
IR Controller
Entertainment Encrypt/Decrypt
Expansion Bus controller
GPIO controller
I2C controller
SPI controller
DFX controller
IEEE1588 and Clock Recovery
NAND controller
GVSPARC
(unknown)
UART Controller
USB Controller (EHCI)
Hit any key to continue ...
%02X:%02X:%02X  
%04X:%04X  
%02X   
Bus .............: %.2x
Device ..........: %.2x
Function ........: %.2x
Vendor ID .......: %.4x
Device ID .......: %.4x
Device Type .....: %s
  Class Code ....: %.2x
  Sub Class .....: %.2x
  Prog I/F ......: %.2x
lspci
    %.2x %.2x 
%.2x 
Hit any key to continue ...
Displays PCI device info.
Usage: ord[2|4] <addr> [[=] <val>]
ord2
ord4
address
value
%02X
%04X
%08X
ord[2|4]
Read or write to memory.
pci2
pci4
device
function
offset
value
%.2x
%.4x
%.8x
pci[2|4]
Usage: pci[2|4] <bus>,<dev>,<func>,<reg> [[=]<val>]
Read or write to PCI configuration space.
port
port2
port4
%.2x
%.4x
%.8x
port[2|4](<addr>) [= <val>]
port[2|4]
Read or write to I/O port.
         port  -- port access size of byte
         port2 -- port access size of word
         port4 -- port access size of double word
ymodem
buffer address
serial port
baud rate
Received 0x%X bytes.
Transfer aborted.
Error during transfer.
usage: ymodem <buf> [<port> [baud rate]]
Received file '%s' (0x%X bytes).
Receive a file from serial using YMODEM.
local apic
(invalid)
reserved
io apic
%d: %016llX-%016llX (%4d%s - %4d%s) %s
Usage: cache on    - Enables L1 and L2 cache.
       cache off   - Disables L1 and L2 cache.
       cache off 1 - Disables L1 cache.
       cache off 2 - Disables L2 cache.
       cache init  - Sets the default caching rules.
       cache flush - Flushes cache (wbinvd).
       cache policy <policy> <base> <end> - Configures caching for an address range.
           <policy>: uc = uncached
                     wc = write combining
Setting default cache rules...
Manipulate the processor cache.
cache
flush
Flushing the caches...
init
Enabling L1 and L2 cache...
policy
base
Configuring cache rules...
error!.
cacheType
Disabling L1 cache...
Disabling L2 cache...
Disabling L1 and L2 cache...
About CEFDK
Standard Features
Advanced Features
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 YES  
 NO   
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 YES  
 NO   
[0;37;0;40m
[00;00H
"2BRbr
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Usage: expflash initNor    - Initialize expansion bus for NOR flash access.
       expflash initNand   - Initialize Denali controller for NAND flash access.
       expflash eraseNand  - Erase entire NAND flash.
       expflash readFTLNand <destAddr> <Block> <count> - Reads a block of data from NAND flash starting at block <block> to <destAddr>.
       expflash writeFTLNand <destAddr> <Block> <count> - Writes a block of data from NAND flash starting at block <block> to <destAddr>.
       expflash norRead <address> - Read data from NOR flash.
       expflash norBlockErase <address> - Erases a block, any adress whithin a block will erase that block.
       expflash norWriteBuffer <srcAddress> <desAddress> <size> - Write data from DRAM to NOR flash in buffer mode.
       expflash burnFlash <srcAddress (DRAM)> <destAddress (Flash)> <size> - Erases and burns the proper flash blocks
initFTLNand: Initializing FTL NAND Controller
initFTLNand: DENALI_FTL_Flash_Init() successful
initFTLNand: DENALI_FTL_Flash_Init() failed
initFTLNand: Too few blocks for basic data integrity test. Aborting test
initFTLNand: Too few data blocks for basic data integrity test. Aborting test
initFTLNand: DENALI_FTL_IdentifyDevice() successful
-------------------------------------------------------------
                      Numer of Blocks: %d 
                      Number of pages: %d 
                      Page data size : %d 
                 ECC bytes per Sector: %d 
  Number of Blocks managed by Spectra: %d 
             SizeOfGlobal Memory pool: %d 
                          Start Block: %d 
-------------------------------------------------------------
initFTLNand: DENALI_FTL_IdentifyDevice() failed
Writing %d blocks from 0x%08x to block %d, bpp=%d
Initialize expansion bus for NOR flash access...
Initialize Denali controller for NAND flash access...
Erasing Entire NAND Flash Image...
Access flash on expansion bus.
------------------------
No NAND flash on board!
readFTLNand: Failed
readFTLNand: Successful
writeFTLNand: Failed
writeFTLNand: Successful
expflash
initNor
initNand
eraseNand
writeFTLNand
write address
block start
block count
readFTLNand
read address
norRead
Read data from NOR flash...
norBlockErase
address
Erases a block...
erase done
norWriteBuffer
source address
Destination address
data size
burnFlash
u*B9
QPRh
u<C9
PRSh
7Sh#
RVSh
addr[0x%x] != 0x%x 
readData[%d] != %d 
readData[0x%x] != 0x%x 
Erase success at block %d
Block %d is a bad block
DeviceMaker = 0x%x
wDeviceType = 0x%x
TotalBlocks = 0x%x
BlockSize = 0x%x
BlockDataSize = 0x%x
PagesPerBlock = 0x%x
PageSize = 0x%x
PageDataSize = 0x%x
PageSpareSize = 0x%x
gSpectraTotalBlock= 0x%x
nandTest
Usage: nandTest 
     NAND TESTING
     Results: PASS
     Results: FAIL
Test nand flash compatibility
Verify logical block %d in spectra partition pass
FTLL Verify block %d - %d Pass
%d time erase failure at block %d
Warning: No NAND flash on board!
gSpectraTotalBlock is too small!
####################Start to Test FTL Lite Partition####################
==================Start to Test FTL Lite Initialization==================
==================FTL Lite Initialization Fail==================
==================FTL Lite Initialization Pass==================
==================Start to Test FTL Lite Erase==================
==================FTL Lite Erase Fail==================
==================FTL Lite Erase Pass==================
==================Start to Test FTL Lite Write==================
==================FTL Lite Write Fail==================
==================FTL Lite Write Pass==================
==================Start to Test FTL Lite Read==================
==================FTL Lite Read Fail==================
==================FTL Lite Read Pass==================
==================Start to Verify FTL Lite Data==================
==================FTL Lite Verify Data Fail==================
==================FTL Lite Verify Data Pass==================
####################Finish Test FTL Lite Partition####################
####################Start to Test FTL Partition####################
==================Start to Test FTL Initialization==================
==================FTL Initialization Fail==================
==================FTL Initialization Pass==================
==================Start to Test FTL Erase==================
==================FTL Erase Fail==================
==================FTL Erase Pass==================
==================Start to Test FTL Write==================
==================FTL Write Fail==================
==================FTL Write Pass==================
==================Start to Test FTL Read==================
==================FTL Read Fail==================
==================FTL Read Pass==================
==================Start to Verify FTL Data==================
==================FTL Verify Data Fail==================
==================FTL Verify Data Pass==================
------------------------------------------------------
--------------------------------------------------------
HtpV
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[email protected],
j h|
------------------------
No NAND flash on board!
Usage:
      --- Erases Blocks.
FTL Lite read fail!
nandFTLL
read
block start
page start
page count
buffer pointer
buf pointer: 0x%08x
erase
block count
Erase block %d - %d
Erase success at block %d
Erase failure at block %d
write
listBadBySig
block end
BAD BLOCK: %d
READ ERROR: %d
listBadByRead
Erase failure: %d
burnNandImg
Nand Img Buffer
Nand Img size in Byte
Abort...
NAND page size = 0x%x
Erase block 8 - 39
Programming done
Successfully wrote %d pages starting at block %d, page %d
  nandFTLL read  <Bl_Start> <Pg> <Pg_Count> <Buf Addr>
      --- Read <Pg_count> pages from NAND to Ram Buf Addr.
  nandFTLL write <Bl_Start> <Pg> <Pg_Count> <Buf Addr>
      --- Write <Pg_count> pages from RAM to NAND.
  nandFTLL erase <Bl_Start> <Bl_Count>
  nandFTLL listBadByRead <BL_Start> <BL_End>
      --- List bad blocks from block <BL_Start> to <BL_End> by Reading it
  nandFTLL burnNandImg <Buf Addr> <Image Size>
      --- Burn CEFDK Nand image from <Buf Addr> to NAND chip with <Image Size> bytes
Successfully read %d pages starting at block %d, page %d
block start: %d, page start: %d, page count: %d
WARNING: This will erae all blocks from %d to %d!
Write error at block %d, page %d
Read error at block %d, page %d
Support 384KB and 512KB CEFDK image size only!
WARNING: This is dangerous, make sure you have correct image load at 0x%X
Press ENTER to continue, others to abort:
Stage1_64K: Program %d pages at block 8
Stage2_128K: Program %d pages at block 16
Stage2_128K: Program %d pages at block 24
Stage2_64K: Program %d pages at block 32
Stage1_128K: Program %d pages at block 8
Stage2_128K: Program %d pages at block 32
Access NAND flash via FTL-Lite API.
Usage:
Boot from flash ...
bootflash
redboot address in NOR
NAND
redboot block address in NAND
FTL Lite initialized failed
  bootflash <NOR> [redboot address in NOR flash] -boot redboot from NOR Flash.
  bootflash <NAND> [redboot blk address in NAND flash] -boot redboot from NAND Flash.
No valid redboot found in flash.
FTL Lite initialized successfully
FTL Lite read Redboot from blk %d fail.
Boot redboot from NOR or NAND flash.
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  F1: Save & Exit Setup
  F2: Upgrade Firmware
Data has been updated
Please Restart the system
  Version:     %s
  Build Time:  %s
  Board:       GoldenBeach
  Board:       ChesapeakeBay
  Board:       FalconFalls
  Board:       PowerHouseLake
  MemType:     DDR2
  MemType:     DDR3
  MemSpeed:    800 MHz
  MemSpeed:    1066 MHz
  MemSpeed:    1333 MHz
  MemSpeed:    1600 MHz
  MemSpeed:    Unknown
 Chn Enabled: 
  Chn Mode:    Linear
transfer
addr
length
settings
Standard Features
  Drive Information 
    SATA Primary
    SATA Secondary
  Memory Information 
    Exe MemTest at Start
    Total Ram:
Data has been updated
  Enable BUnit Buffer:
  Enable Security Unit:
  Enable Memory Scrambling:
  Use DRAM Override:
  USB A0 FIB:
  Disable SATA SSC:
  Automatic boot Redboot:
  USBKeyboard Detect:
  Dynamic Rcvn Tuning:
  Dynamic Read Tuning:
  Dynamic Write Tuning:
  Dynamic Write Levelization:
  Fast Audio Path:
BIOS Settings
        CEFDK - Consumer Electronics Firmware Development Kit Setup            
  Esc: Quit                               <Arrow Keys> : Select Item
To begin the upgrade, YMODEM the file .
Transfer has been cancelled, press [esc] to continue.            
Burning the Flash .                                              
Complete.  Please restart your system.                           
                                                              
                            About CEFDK                                        
  Chn Mode:    Interleave Mode 1
  Chn Mode:    Interleave Mode 2
  Esc: Return to Previous Menu                 <--/--> : Tranverse Fields
Usage: Settings - Displays the BIOS Settings of CEFDK.
CEFDK - Consumer Electronics Firmware Development Kit Setup
  Date (mm/dd/yyyy)          /  /
  Time (hh:mm:ss AM/PM)      :  :
         CEFDK - Consumer Electronics Firmware Development Kit Setup           
                       Advanced Features                                       
  Esc: Return to Previous Menu                 <Arror Keys> : Select Item
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Reading boot sector...
done.
Switching to boot loader.
Error: Invalid boot sector.
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Loading 8051 MicroCode at 0x40000
I2C error: Unable to open I2C_BAR1
External PIC version %s
/dev/ttyS0
/dev/ttyS1
I2C error: %s (%d)
[^_]
L[^_]
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,[^_]
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counter <= 2
8254.c
Assert failed at %s:%d (%s)
mode <= 5
counterValue <= 0xFFFF
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irq < 16
8259.c
Assert failed at %s:%d (%s)
[^_]
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,[^_]
[^_]
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map->length + 1 < map->maxDesc
addr_map.c
Assert failed at %s:%d (%s)
map->maxDesc > 0
The blocks reserve for redboot is too large!
INT 13h sub 15h: start logical block 2!
INT 13h sub 15h: end logical block %d!
startSector = %d, sectors = %d
read_dst = %d
pg = %d, offset = %d
blk = %d, off_into_blk = %d
write_src = %d
pg = %d, off_into_page = %d
%02X
Read Fail here!
Write Fail here!!!
Flush_Cache Fail here!!!
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ESI = %08x  EDI = %08x  EBP = %08x  FLG = %08x
DS  = %04x      ES =  %04x      FS  = %04x      GS  = %04x
Vector: 0x%02X
CS:IP = %04x:%04x
SS:ESP = %04x:%08x
Stack:
   %08x:
 %08x
/dev/tty0
/dev/ttyS0
/dev/ttyS1
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/dev/null
/dev/ttyS0
/dev/ttyS1
/dev/ttyS2
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video.c
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col < videoState->numberColumns
3-2.gen4_css.bin

Code: Select all

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Verify stage 3 pass, try secure boot to Linux from NOR Flash ...
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,:Intel Lincroft SCH Microcode Version 000.064d:00000000:Apr 28 2009
:10:46:28
;ASTEP=def;
LGI_POWER_OVER_RIDE=def;
ENABLE_DDR_RCOMP=def;
USE_DRAM_RDY=def;
CSTATE_TIMINGS=undef;
DPSLP_INVERSION=undef;
LAB_DEBUG_MESSAGES=undef;
ENABLE_DDR_RCOMP=def;
CSTATE_TIMINGS=undef;
CLK_RATIO_12_TO_1=undef;
CEFDK - Production Release %s
  core                      : %s
  cs_gen4                   : %s
  MemType                   : DDR2 
  MemType                   : DDR3 
  MemSpeed                  : 800
  MemSpeed                  : 1066
  MemSpeed                  : 1333
  MemSpeed                  : 1600
  MemSpeed                  : Unknown
  Channels Enabled          : 
  Channel Mode              : 
Hit a key to start the shell...
    fuse_idcode_version[4:0]          -  %04yb
    fuse_sku_id[6:0]                  -  %06yb
    fuse_device_serial_number1[31:0]  -  0x%08X
    fuse_device_serial_number2[31:0]  -  0x%08X
    fuse_ca_vendor_config[15:8]       -  0x%02X
    fuse_ca_vendor_config[7:0]        -  0x%02X
WARNING: The part you are using is UNFUSED and cannot boot!
Please have your Unfused part swapped with a Fused part
by the SDV Boards Ops Team ASAP!
WARNING: Unsupported CPU Frequency strapping %dMhz, using maximum fused CPU Frequency %dMhz
CPU Frequency strapped for %dMhz, LCC fusing limit %dMhz
Attempting to boot Linux from NOR ...
Kernel not found at 0x%X in NOR, continue booting from HD.
Attempting to boot Linux from NAND ...
DENALI_FTL_Page_Read FAIL at 0x%X.
Kernel not found at 0x%X block in NAND, continue booting Linux from HD.
Attempting to boot Linux from HD ...
Kernel not found at 0x%X sector in hard disk, continue booting from flash.
Attempting to boot Redboot from NOR flash ...
Attempting to boot Redboot from NAND flash ...
FTL Lite read Redboot from blk %d fail.
Attempting to boot Redboot from hard disk ...
console=ttyS0,115200 root=/dev/mtdblock2 rw mem=exactmap [email protected] [email protected]
console=ttyS0,115200 root=/dev/sda2 rw mem=exactmap [email protected] [email protected]
Sodaville Stepping: 
Unknown revision
Board:  GoldenBeach: 
Board:  ChesapeakeBay 
Board:  FalconFalls 
Board:  PowerHouseLake 
Version Information - 
Memory configuration - 
 (Safe Settings)
 (Override Settings)
Linear
Interleave Mode 1
Interleave Mode 2
All A/V devices use IRQ 4.
Fuse bits:
Unknown FSB Speed.
Unknown Cacheable memory Size
FTL Lite initialized failed
Shell exit
Please restart the board
Sodaville 2.005
bad reg address
bad dev address
success
not initialized
bad op type
tx empty timeout
rx full timeout
unknown error %d
!!! I2C WR: *%08x=%08x
!!! *retData=0x%x
I2CWaitRxFull
I2CWaitTxEmpty
!!! IN %s: stop=%d ISR=0x%08x mask=%08x rwm=%08x
!!! EXIT(%d) %s: count=%d ISR=0x%08x mask=%08x rwm=%08x
!!! EXIT(%d) %s: count=%d ISR=0x%08x mask=%08x rwm=%08x toTick=%08x%08x roll=%08x%08x procTicks=%08x%08x
!!! IN %s: stop=%d op=%d ISR=0x%08x mask=%08x rwm=%08x
Usage:
i2c 0|1|2 <I2C dev 7bit addr> [<PCI bus> <dev> <fun>]
i2c r[ead] [<bytes> [<dest addr>]] | w[rite] <byte value> [<val2> <val3> ...]]
i2c w 0x4 1 0 0 0xff 0 0 0 0 0 0 0 0
i2c r
Error: First do: %s <bus> <dev addr>
Bad arg.
Usage: i2c r[ead] [<bytes> [<buffer addr>]]
Bad arg.
Usage: i2c w[rite] <byte value> [<val2> <val3> ...]
I2C buses read and write (SV ver).
i2c d[ebug]
 [<debug msg level: 0|1|2>]
Example:
i2c 2 0x44
STATUS:
I2C Bus: %s
%d (0x%x)
I2C Dev: %s
PCI: 0x%x.%x.%x
Bad byte count %d need >0
0x%02x%s
I2C error: %s (%d)
Read %d bytes
I2C DEBUG @ %d
BAR%d:	%08X
ICR_%d		%08X
ISR_%d		%08X
(ISAR_%d		%08X)
IDBR_%d		%08X
(ICCR_%d		%08X)
IBMR_%d		%08X
IWCR_%d		%08X
ISMSCR_%d	%08X
ISMLCR_%d	%08X
IFMSCR_%d	%08X
IFMLCR_%d	%08X
IDDS_RATE_LB%d	%08X
IDDS_RATE_UB%d	%08X
Unknown arg.
Usage:
Boot from flash ...
bootflash
redboot address in NOR
NAND
redboot block address in NAND
FTL Lite initialized failed
  bootflash <NOR> [redboot address in NOR flash] -boot redboot from NOR Flash.
  bootflash <NAND> [redboot blk address in NAND flash] -boot redboot from NAND Flash.
No valid redboot found in flash.
FTL Lite initialized successfully
FTL Lite read Redboot from blk %d fail.
Boot redboot from NOR or NAND flash.
writeCount = 0x%X
Done
Erasing block at 0x%x
Data = 0x%08X
Rounding up copy size to an erase boundary.. Copy Size = 0x%x
Burning the flash using the write buffer
bootkernel
Usage: bootkernel.
Boot Linux kernel from NAND flash block %d...
DENALI_FTL_Page_Read FAIL at 0x%X.
Error booting Linux: Invalid or missing kernel at block 0x%X.
Error booting Linux: Invalid or missing initrd.
Boot Linux kernel from NAND flash.
console=ttyS0,115200 root=/dev/ram0 mem=exactmap memmap=640K[email protected] [email protected]
%d MBytes
%02d
[%s]
%04d
  Cachable Memory size:
  Enable BUnit Buffer:
  Enable Security Unit:
  Enable Memory Scrambling:
  Use DRAM Override:
  USB A0 FIB:
  Disable SATA SSC:
  Automatic boot Redboot:
  USBKeyboard Detect:
  Dynamic Rcvn Tuning:
  Dynamic Read Tuning:
  Dynamic Write Tuning:
  Dynamic Write Levelization:
  F1: Save & Exit Setup
  F2: Upgrade Firmware
Data has been updated
Please Restart the system
(Type   Spd Wd)
(Gb)
(CK)
(ps) 
 (ps) 
  Version:     %s
  Build Time:  %s
  Board:       GoldenBeach
  Board:       ChesapeakeBay
  Board:       FalconFalls
  Board:       PowerHouseLake
  MemType:     DDR2
  MemType:     DDR3
  MemSpeed:    800 MHz
  MemSpeed:    1066 MHz
  MemSpeed:    1333 MHz
  MemSpeed:    1600 MHz
  MemSpeed:    Unknown
 Chn Enabled: 
  Chn Mode:    Linear
transfer
addr
length
settings
Standard Features
  Drive Information 
    SATA Primary
    SATA Secondary
  Memory Information 
    Exe MemTest at Start
    Total Ram:
    Mode:
    CHA Enable:
    CHB Enable:
Data has been updated
BIOS Settings
DDR2 -  800 x8 
DDR2 -  800 x16
DDR3 -  800 x8 
DDR3 -  800 x16
DDR3 - 1066 x8 
DDR3 - 1066 x16
DDR3 - 1333 x8 
DDR3 - 1333 x16
DDR3 - 1600 x8 
DDR3 - 1600 x16
         CEFDK - Consumer Electronics Firmware Development Kit Setup           
                       Advanced Features                                       
  Esc: Return to Previous Menu                 <Arror Keys> : Select Item
        CEFDK - Consumer Electronics Firmware Development Kit Setup            
  Esc: Quit                               <Arrow Keys> : Select Item
To begin the upgrade, YMODEM the file .
Transfer has been cancelled, press [esc] to continue.            
Burning the Flash .                                              
Complete.  Please restart your system.                           
                                                              
                           DRAM Settings                                       
     DRAM       Den   tCL  tRC    tRAS    tWTR   tRRD    tFAW     tRFC 
%s %2d    %2d   %5d  %5d   %5d  %5d   %5d   %6d
  S: Save Entry        D: Restore Default           F: Restore Fail Safe
                            About CEFDK                                        
  Chn Mode:    Interleave Mode 1
  Chn Mode:    Interleave Mode 2
  Esc: Return to Previous Menu                 <--/--> : Tranverse Fields
Usage: Settings - Displays the BIOS Settings of CEFDK.
CEFDK - Consumer Electronics Firmware Development Kit Setup
  Date (mm/dd/yyyy)          /  /
  Time (hh:mm:ss AM/PM)      :  :
mmap
Displays a system memory map.
ata-map
Usage: ata-map none|lba
none
Sets the ATA geometry mapping.
bootata
Attempting ATA boot...
Boots from the primary master ATA device.
Invalid or missing initrd.
mem=
bootlinux
Linux command line = '%s'
Attempting to boot Linux from flash...
Error booting Linux: Invalid or missing kernel at 0x%08X.
Error booting Linux: Invalid or missing initrd.
Boots linux from flash. Usage: bootlinux "<kernel cmd line>"
Error: No room in IRQ table to add entry for device %02x:%02x:%02x
pciIsBridge(bus, dev, func)
pci_alloc.c
Assert failed at %s:%d (%s)
Error: Link %d for PCI device %X:%X:%X exceeds maximum (%d)
Intel(R) Consumer Electronics Firmware Development Kit (Intel(R) CEFDK)
Copyright (C) 1999-2009 Intel Corporation. All rights reserved.
Build Time (%s).
08/27/09 10:25:01
{%x}
exit
help
%10s - %s
reset
shell> 
Error: Missing ".
Error: Invalid command.
Displays this screen.
Stops the shell.
Error: Unable to open redirection file: '%s'.
Invalid %s: '%s'
lspci : displays info about all PCI devices
 -p : pauses after every 25 lines
 -l : list all devices on [bus/buses]
 -s : dump configuration space of [bus [device [function]]] MAXREGOFFSET 
16550-Compatible Serial Controller
Generic PCI Hot-Plug Controller
IPMI Keyboard Controller Interface
Data Acquisition/Signal Processing
BB:DD:FF  VID :DID   DevClass  IRQ  Device Type
--------  ----:----  --------  ---  -------------------------------
===============================================
Bus : %x   Device : %x   Function :  %x
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
Options:
 -h : prints this message
 -v : verbose mode
IDE Controller
SATA Controller
Mass Storage Controller
Ethernet Controller
VGA-compatible Controller
Display Controller
Video Device
Audio Device
Hi-Definition Audio Device
Multimedia Device
Host-PCI Bridge
PCI-ISA Bridge
PCI-PCI Bridge
PCI-CardBus Bridge
Modem Controller
Smart Card Controller
IO(x) APIC
SDIO Controller
System Peripheral
USB Controller (UHCI)
SMBus Controller
IR Controller
Entertainment Encrypt/Decrypt
Expansion Bus controller
GPIO controller
I2C controller
SPI controller
DFX controller
IEEE1588 and Clock Recovery
NAND controller
GVSPARC
(unknown)
UART Controller
USB Controller (EHCI)
Hit any key to continue ...
%02X:%02X:%02X  
%04X:%04X  
%02X   
Bus .............: %.2x
Device ..........: %.2x
Function ........: %.2x
Vendor ID .......: %.4x
Device ID .......: %.4x
Device Type .....: %s
  Class Code ....: %.2x
  Sub Class .....: %.2x
  Prog I/F ......: %.2x
lspci
    %.2x %.2x 
%.2x 
Hit any key to continue ...
Displays PCI device info.
Usage: ord[2|4] <addr> [[=] <val>]
ord2
ord4
address
value
%02X
%04X
%08X
ord[2|4]
Read or write to memory.
pci2
pci4
device
function
offset
value
%.2x
%.4x
%.8x
pci[2|4]
Usage: pci[2|4] <bus>,<dev>,<func>,<reg> [[=]<val>]
Read or write to PCI configuration space.
port
port2
port4
%.2x
%.4x
%.8x
port[2|4](<addr>) [= <val>]
port[2|4]
Read or write to I/O port.
         port  -- port access size of byte
         port2 -- port access size of word
         port4 -- port access size of double word
ymodem
buffer address
serial port
baud rate
Received 0x%X bytes.
Transfer aborted.
Error during transfer.
usage: ymodem <buf> [<port> [baud rate]]
Received file '%s' (0x%X bytes).
Receive a file from serial using YMODEM.
local apic
(invalid)
reserved
io apic
%d: %016llX-%016llX (%4d%s - %4d%s) %s
Usage: cache on    - Enables L1 and L2 cache.
       cache off   - Disables L1 and L2 cache.
       cache off 1 - Disables L1 cache.
       cache off 2 - Disables L2 cache.
       cache init  - Sets the default caching rules.
       cache flush - Flushes cache (wbinvd).
       cache policy <policy> <base> <end> - Configures caching for an address range.
           <policy>: uc = uncached
                     wc = write combining
Setting default cache rules...
Manipulate the processor cache.
cache
flush
Flushing the caches...
init
Enabling L1 and L2 cache...
policy
base
Configuring cache rules...
error!.
cacheType
Disabling L1 cache...
Disabling L2 cache...
Disabling L1 and L2 cache...
About CEFDK
Standard Features
Advanced Features
DRAM Settings
 96MB 
 128MB
 256MB
 512MB
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 YES  
 NO   
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
MODE0-NO INTERLEAVING (Need 1 channel at least)
MODE1-INTERLEAVING (Need 2 channels)           
MODE2-INTERLEAVING (Need 2 channels)      
[0;37;0;40m
[00;00H
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Usage: expflash initNor    - Initialize expansion bus for NOR flash access.
       expflash initNand   - Initialize Denali controller for NAND flash access.
       expflash eraseNand  - Erase entire NAND flash.
       expflash readFTLNand <destAddr> <Block> <count> - Reads a block of data from NAND flash starting at block <block> to <destAddr>.
       expflash writeFTLNand <destAddr> <Block> <count> - Writes a block of data from NAND flash starting at block <block> to <destAddr>.
       expflash norRead <address> - Read data from NOR flash.
       expflash norBlockErase <address> - Erases a block, any adress whithin a block will erase that block.
       expflash norWriteBuffer <srcAddress> <desAddress> <size> - Write data from DRAM to NOR flash in buffer mode.
       expflash burnFlash <srcAddress (DRAM)> <destAddress (Flash)> <size> - Erases and burns the proper flash blocks
initFTLNand: Initializing FTL NAND Controller
initFTLNand: DENALI_FTL_Flash_Init() successful
initFTLNand: DENALI_FTL_Flash_Init() failed
initFTLNand: Too few blocks for basic data integrity test. Aborting test
initFTLNand: Too few data blocks for basic data integrity test. Aborting test
initFTLNand: DENALI_FTL_IdentifyDevice() successful
-------------------------------------------------------------
                      Numer of Blocks: %d 
                      Number of pages: %d 
                      Page data size : %d 
                 ECC bytes per Sector: %d 
  Number of Blocks managed by Spectra: %d 
             SizeOfGlobal Memory pool: %d 
                          Start Block: %d 
-------------------------------------------------------------
initFTLNand: DENALI_FTL_IdentifyDevice() failed
Writing %d blocks from 0x%08x to block %d, bpp=%d
Initialize expansion bus for NOR flash access...
Initialize Denali controller for NAND flash access...
Erasing Entire NAND Flash Image...
Access flash on expansion bus.
------------------------
No NAND flash on board!
readFTLNand: Failed
readFTLNand: Successful
writeFTLNand: Failed
writeFTLNand: Successful
expflash
initNor
initNand
eraseNand
writeFTLNand
write address
block start
block count
readFTLNand
read address
norRead
Read data from NOR flash...
norBlockErase
address
Erases a block...
erase done
norWriteBuffer
source address
Destination address
data size
burnFlash
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No NAND flash on board!
Usage:
      --- Erases Blocks.
FTL Lite read fail!
nandFTLL
read
block start
page start
page count
buffer pointer
buf pointer: 0x%08x
erase
block count
Erase block %d - %d
Erase success at block %d
Erase failure at block %d
write
listBadBySig
block end
BAD BLOCK: %d
READ ERROR: %d
listBadByRead
Erase failure: %d
burnNandImg
Nand Img Buffer
Abort...
NAND page size = 0x%x
Erase block 8 - 48
Programming done
Successfully wrote %d pages starting at block %d, page %d
  nandFTLL read  <Bl_Start> <Pg> <Pg_Count> <Buf Addr>
      --- Read <Pg_count> pages from NAND to Ram Buf Addr.
  nandFTLL write <Bl_Start> <Pg> <Pg_Count> <Buf Addr>
      --- Write <Pg_count> pages from RAM to NAND.
  nandFTLL erase <Bl_Start> <Bl_Count>
  nandFTLL listBadBySig <BL_Start> <BL_End>
      --- List bad blocks from block <BL_Start> to <BL_End> by Flag in Spare
  nandFTLL listBadByRead <BL_Start> <BL_End>
      --- List bad blocks from block <BL_Start> to <BL_End> by Reading it
  nandFTLL burnNandImg <Buf Addr>
      --- Burn CEFDK Nand image from <Buf Addr> to NAND chip
Successfully read %d pages starting at block %d, page %d
block start: %d, page start: %d, page count: %d
WARNING: This will erae all blocks from %d to %d!
Write error at block %d, page %d
Read error at block %d, page %d
WARNING: This is dangerous, make sure you have correct image load at 0x%X
Press ENTER to continue, others to abort:
Stage1_64K: Program %d pages at block 8
Stage2_128K: Program %d pages at block 16
Stage2_128K: Program %d pages at block 24
Stage2_64K: Program %d pages at block 32
Access NAND flash via FTL-Lite API.
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Reading boot sector...
done.
Switching to boot loader.
Error: Invalid boot sector.
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I2C error: Unable to open I2C_BAR1
External PIC version %s
/dev/ttyS0
/dev/ttyS1
I2C error: %s (%d)
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counter <= 2
8254.c
Assert failed at %s:%d (%s)
mode <= 5
counterValue <= 0xFFFF
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irq < 16
8259.c
Assert failed at %s:%d (%s)
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addr_map.c
Assert failed at %s:%d (%s)
map->maxDesc > 0
INT 13h sub 15h: start blocks %d!
INT 13h sub 15h: end blocks %d!
startSector = %d, sectors = %d
read_dst = %d
pg = %d, offset = %d
blk = %d, off_into_blk = %d
write_src = %d
pg = %d, off_into_page = %d
%02X
Read Fail here!
Write Fail here!!!
Flush_Cache Fail here!!!
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EAX = %08x  EBX = %08x  ECX = %08x  EDX = %08x
ESI = %08x  EDI = %08x  EBP = %08x  FLG = %08x
DS  = %04x      ES =  %04x      FS  = %04x      GS  = %04x
Vector: 0x%02X
CS:IP = %04x:%04x
SS:ESP = %04x:%08x
Stack:
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video.c
Assert failed at %s:%d (%s)
col < videoState->numberColumns
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nikescar
Android 1.0
Posts: 11
Joined: Tue Jan 17, 2012 12:53 pm
GTV Device Owned: Logitech Revue

Re: Any Hope of ever modding?

Post by nikescar » Fri Mar 09, 2012 4:25 am

3-3.gen4_nand.bin

Code: Select all

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Verify stage2 PASS
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Unable to Verify stage 3 RAMdisk RSA Signature
Verify stage 3 pass, try secure boot to Linux from NOR Flash ...
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,:Intel Lincroft SCH Microcode Version 000.064d:00000000:Apr 28 2009
:10:46:28
;ASTEP=def;
LGI_POWER_OVER_RIDE=def;
ENABLE_DDR_RCOMP=def;
USE_DRAM_RDY=def;
CSTATE_TIMINGS=undef;
DPSLP_INVERSION=undef;
LAB_DEBUG_MESSAGES=undef;
ENABLE_DDR_RCOMP=def;
CSTATE_TIMINGS=undef;
CLK_RATIO_12_TO_1=undef;
CEFDK - Production Release %s
  core                      : %s
  cs_gen4                   : %s
  MemType                   : DDR2 
  MemType                   : DDR3 
  MemSpeed                  : 800
  MemSpeed                  : 1066
  MemSpeed                  : 1333
  MemSpeed                  : 1600
  MemSpeed                  : Unknown
  Channels Enabled          : 
  Channel Mode              : 
Hit a key to start the shell...
    fuse_idcode_version[4:0]          -  %04yb
    fuse_sku_id[6:0]                  -  %06yb
    fuse_device_serial_number1[31:0]  -  0x%08X
    fuse_device_serial_number2[31:0]  -  0x%08X
    fuse_ca_vendor_config[15:8]       -  0x%02X
    fuse_ca_vendor_config[7:0]        -  0x%02X
WARNING: The part you are using is UNFUSED and cannot boot!
Please have your Unfused part swapped with a Fused part
by the CE4100 Boards Ops Team ASAP!
CPU Frequency        : %d MHz
Attempting to boot Linux from NOR ...
Kernel not found at 0x%X in NOR, continue booting from HD.
Attempting to boot Linux from NAND ...
DENALI_FTL_Page_Read FAIL at 0x%X.
Kernel not found at 0x%X block in NAND, continue booting Linux from HD.
Attempting to boot Linux from HD ...
Kernel not found at 0x%X sector in hard disk, continue booting from flash.
Attempting to boot Redboot from NOR flash ...
Attempting to boot Redboot from NAND flash ...
FTL Lite read Redboot from blk %d fail.
Attempting to boot Redboot from hard disk ...
console=ttyS0,115200 root=/dev/mtdblock2 rw mem=exactmap [email protected] [email protected]
console=ttyS0,115200 root=/dev/sda2 rw mem=exactmap [email protected] [email protected]
CE4100 Stepping: 
Unknown revision
Board:  GoldenBeach: 
Board:  ChesapeakeBay 
Board:  FalconFalls 
Board:  PowerHouseLake 
Version Information - 
Memory configuration - 
Linear
Interleave Mode 1
Interleave Mode 2
All A/V devices use IRQ 4.
FTL Lite read MAC data fail.
FTL Lite initialized failed
Fuse bits:
Shell exit
Please restart the board
CE4100 4.018
bad reg address
bad dev address
success
not initialized
bad op type
tx empty timeout
rx full timeout
unknown error %d
!!! I2C WR: *%08x=%08x
!!! *retData=0x%x
I2CWaitRxFull
I2CWaitTxEmpty
!!! IN %s: stop=%d ISR=0x%08x mask=%08x rwm=%08x
!!! EXIT(%d) %s: count=%d ISR=0x%08x mask=%08x rwm=%08x
!!! EXIT(%d) %s: count=%d ISR=0x%08x mask=%08x rwm=%08x toTick=%08x%08x roll=%08x%08x procTicks=%08x%08x
!!! IN %s: stop=%d op=%d ISR=0x%08x mask=%08x rwm=%08x
Usage:
i2c 0|1|2 <I2C dev 7bit addr> [<PCI bus> <dev> <fun>]
i2c r[ead] [<bytes> [<dest addr>]] | w[rite] <byte value> [<val2> <val3> ...]]
i2c w 0x4 1 0 0 0xff 0 0 0 0 0 0 0 0
i2c r
Error: First do: %s <bus> <dev addr>
Bad arg.
Usage: i2c r[ead] [<bytes> [<buffer addr>]]
Bad arg.
Usage: i2c w[rite] <byte value> [<val2> <val3> ...]
I2C buses read and write (SV ver).
i2c d[ebug]
 [<debug msg level: 0|1|2>]
Example:
i2c 2 0x44
STATUS:
I2C Bus: %s
%d (0x%x)
I2C Dev: %s
PCI: 0x%x.%x.%x
Bad byte count %d need >0
0x%02x%s
I2C error: %s (%d)
Read %d bytes
I2C DEBUG @ %d
BAR%d:	%08X
ICR_%d		%08X
ISR_%d		%08X
(ISAR_%d		%08X)
IDBR_%d		%08X
(ICCR_%d		%08X)
IBMR_%d		%08X
IWCR_%d		%08X
ISMSCR_%d	%08X
ISMLCR_%d	%08X
IFMSCR_%d	%08X
IFMLCR_%d	%08X
IDDS_RATE_LB%d	%08X
IDDS_RATE_UB%d	%08X
Unknown arg.
writeCount = 0x%X
Done
Erasing block at 0x%x
Data = 0x%08X
Rounding up copy size to an erase boundary.. Copy Size = 0x%x
Burning the flash using the write buffer
bootkernel
Usage: bootkernel.
root=/dev/ram
Boot Linux kernel from NAND flash block %d...
DENALI_FTL_Page_Read FAIL at 0x%X.
Error booting Linux: Invalid or missing kernel at block 0x%X.
Error booting Linux: Invalid or missing initrd.
Boot Linux kernel from NAND flash.
console=ttyS0,115200 root=/dev/ram0 mem=exactmap [email protected]
mmap
Displays a system memory map.
ata-map
Usage: ata-map none|lba
none
Sets the ATA geometry mapping.
bootata
Attempting ATA boot...
Boots from the primary master ATA device.
Invalid or missing initrd.
mem=
bootlinux
Linux command line = '%s'
Attempting to boot Linux from flash...
Error booting Linux: Invalid or missing kernel at 0x%08X.
Error booting Linux: Invalid or missing initrd.
Boots linux from flash. Usage: bootlinux "<kernel cmd line>"
Error: No room in IRQ table to add entry for device %02x:%02x:%02x
pciIsBridge(bus, dev, func)
pci_alloc.c
Assert failed at %s:%d (%s)
Error: Link %d for PCI device %X:%X:%X exceeds maximum (%d)
Intel(R) Consumer Electronics Firmware Development Kit (Intel(R) CEFDK)
Copyright (C) 1999-2010 Intel Corporation. All rights reserved.
Build Time (%s).
04/08/10 16:56:18
{%x}
exit
help
%10s - %s
reset
shell> 
Error: Missing ".
Error: Invalid command.
Displays this screen.
Stops the shell.
Error: Unable to open redirection file: '%s'.
Invalid %s: '%s'
lspci : displays info about all PCI devices
 -p : pauses after every 25 lines
 -l : list all devices on [bus/buses]
 -s : dump configuration space of [bus [device [function]]] MAXREGOFFSET 
16550-Compatible Serial Controller
Generic PCI Hot-Plug Controller
IPMI Keyboard Controller Interface
Data Acquisition/Signal Processing
BB:DD:FF  VID :DID   DevClass  IRQ  Device Type
--------  ----:----  --------  ---  -------------------------------
===============================================
Bus : %x   Device : %x   Function :  %x
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
Options:
 -h : prints this message
 -v : verbose mode
IDE Controller
SATA Controller
Mass Storage Controller
Ethernet Controller
VGA-compatible Controller
Display Controller
Video Device
Audio Device
Hi-Definition Audio Device
Multimedia Device
Host-PCI Bridge
PCI-ISA Bridge
PCI-PCI Bridge
PCI-CardBus Bridge
Modem Controller
Smart Card Controller
IO(x) APIC
SDIO Controller
System Peripheral
USB Controller (UHCI)
SMBus Controller
IR Controller
Entertainment Encrypt/Decrypt
Expansion Bus controller
GPIO controller
I2C controller
SPI controller
DFX controller
IEEE1588 and Clock Recovery
NAND controller
GVSPARC
(unknown)
UART Controller
USB Controller (EHCI)
Hit any key to continue ...
%02X:%02X:%02X  
%04X:%04X  
%02X   
Bus .............: %.2x
Device ..........: %.2x
Function ........: %.2x
Vendor ID .......: %.4x
Device ID .......: %.4x
Device Type .....: %s
  Class Code ....: %.2x
  Sub Class .....: %.2x
  Prog I/F ......: %.2x
lspci
    %.2x %.2x 
%.2x 
Hit any key to continue ...
Displays PCI device info.
Usage: ord[2|4] <addr> [[=] <val>]
ord2
ord4
address
value
%02X
%04X
%08X
ord[2|4]
Read or write to memory.
pci2
pci4
device
function
offset
value
%.2x
%.4x
%.8x
pci[2|4]
Usage: pci[2|4] <bus>,<dev>,<func>,<reg> [[=]<val>]
Read or write to PCI configuration space.
port
port2
port4
%.2x
%.4x
%.8x
port[2|4](<addr>) [= <val>]
port[2|4]
Read or write to I/O port.
         port  -- port access size of byte
         port2 -- port access size of word
         port4 -- port access size of double word
ymodem
buffer address
serial port
baud rate
Received 0x%X bytes.
Transfer aborted.
Error during transfer.
usage: ymodem <buf> [<port> [baud rate]]
Received file '%s' (0x%X bytes).
Receive a file from serial using YMODEM.
local apic
(invalid)
reserved
io apic
%d: %016llX-%016llX (%4d%s - %4d%s) %s
Usage: cache on    - Enables L1 and L2 cache.
       cache off   - Disables L1 and L2 cache.
       cache off 1 - Disables L1 cache.
       cache off 2 - Disables L2 cache.
       cache init  - Sets the default caching rules.
       cache flush - Flushes cache (wbinvd).
       cache policy <policy> <base> <end> - Configures caching for an address range.
           <policy>: uc = uncached
                     wc = write combining
Setting default cache rules...
Manipulate the processor cache.
cache
flush
Flushing the caches...
init
Enabling L1 and L2 cache...
policy
base
Configuring cache rules...
error!.
cacheType
Disabling L1 cache...
Disabling L2 cache...
Disabling L1 and L2 cache...
About CEFDK
Standard Features
Advanced Features
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 YES  
 NO   
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 YES  
 NO   
[0;37;0;40m
[00;00H
"2BRbr
#3CScsjdteuVfv
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Usage: expflash initNor    - Initialize expansion bus for NOR flash access.
       expflash initNand   - Initialize Denali controller for NAND flash access.
       expflash eraseNand  - Erase entire NAND flash.
       expflash readFTLNand <destAddr> <Block> <count> - Reads a block of data from NAND flash starting at block <block> to <destAddr>.
       expflash writeFTLNand <destAddr> <Block> <count> - Writes a block of data from NAND flash starting at block <block> to <destAddr>.
       expflash norRead <address> - Read data from NOR flash.
       expflash norBlockErase <address> - Erases a block, any adress whithin a block will erase that block.
       expflash norWriteBuffer <srcAddress> <desAddress> <size> - Write data from DRAM to NOR flash in buffer mode.
       expflash burnFlash <srcAddress (DRAM)> <destAddress (Flash)> <size> - Erases and burns the proper flash blocks
initFTLNand: Initializing FTL NAND Controller
initFTLNand: DENALI_FTL_Flash_Init() successful
initFTLNand: DENALI_FTL_Flash_Init() failed
initFTLNand: Too few blocks for basic data integrity test. Aborting test
initFTLNand: Too few data blocks for basic data integrity test. Aborting test
initFTLNand: DENALI_FTL_IdentifyDevice() successful
-------------------------------------------------------------
                      Numer of Blocks: %d 
                      Number of pages: %d 
                      Page data size : %d 
                 ECC bytes per Sector: %d 
  Number of Blocks managed by Spectra: %d 
             SizeOfGlobal Memory pool: %d 
                          Start Block: %d 
-------------------------------------------------------------
initFTLNand: DENALI_FTL_IdentifyDevice() failed
Writing %d blocks from 0x%08x to block %d, bpp=%d
Initialize expansion bus for NOR flash access...
Initialize Denali controller for NAND flash access...
Erasing Entire NAND Flash Image...
Access flash on expansion bus.
------------------------
No NAND flash on board!
readFTLNand: Failed
readFTLNand: Successful
writeFTLNand: Failed
writeFTLNand: Successful
expflash
initNor
initNand
eraseNand
writeFTLNand
write address
block start
block count
readFTLNand
read address
norRead
Read data from NOR flash...
norBlockErase
address
Erases a block...
erase done
norWriteBuffer
source address
Destination address
data size
burnFlash
u*B9
QPRh
u<C9
PRSh
7Sh#
RVSh
addr[0x%x] != 0x%x 
readData[%d] != %d 
readData[0x%x] != 0x%x 
Erase success at block %d
Block %d is a bad block
DeviceMaker = 0x%x
wDeviceType = 0x%x
TotalBlocks = 0x%x
BlockSize = 0x%x
BlockDataSize = 0x%x
PagesPerBlock = 0x%x
PageSize = 0x%x
PageDataSize = 0x%x
PageSpareSize = 0x%x
gSpectraTotalBlock= 0x%x
nandTest
Usage: nandTest 
     NAND TESTING
     Results: PASS
     Results: FAIL
Test nand flash compatibility
Verify logical block %d in spectra partition pass
FTLL Verify block %d - %d Pass
%d time erase failure at block %d
Warning: No NAND flash on board!
gSpectraTotalBlock is too small!
####################Start to Test FTL Lite Partition####################
==================Start to Test FTL Lite Initialization==================
==================FTL Lite Initialization Fail==================
==================FTL Lite Initialization Pass==================
==================Start to Test FTL Lite Erase==================
==================FTL Lite Erase Fail==================
==================FTL Lite Erase Pass==================
==================Start to Test FTL Lite Write==================
==================FTL Lite Write Fail==================
==================FTL Lite Write Pass==================
==================Start to Test FTL Lite Read==================
==================FTL Lite Read Fail==================
==================FTL Lite Read Pass==================
==================Start to Verify FTL Lite Data==================
==================FTL Lite Verify Data Fail==================
==================FTL Lite Verify Data Pass==================
####################Finish Test FTL Lite Partition####################
####################Start to Test FTL Partition####################
==================Start to Test FTL Initialization==================
==================FTL Initialization Fail==================
==================FTL Initialization Pass==================
==================Start to Test FTL Erase==================
==================FTL Erase Fail==================
==================FTL Erase Pass==================
==================Start to Test FTL Write==================
==================FTL Write Fail==================
==================FTL Write Pass==================
==================Start to Test FTL Read==================
==================FTL Read Fail==================
==================FTL Read Pass==================
==================Start to Verify FTL Data==================
==================FTL Verify Data Fail==================
==================FTL Verify Data Pass==================
------------------------------------------------------
--------------------------------------------------------
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[email protected],
j h|
------------------------
No NAND flash on board!
Usage:
      --- Erases Blocks.
FTL Lite read fail!
nandFTLL
read
block start
page start
page count
buffer pointer
buf pointer: 0x%08x
erase
block count
Erase block %d - %d
Erase success at block %d
Erase failure at block %d
write
listBadBySig
block end
BAD BLOCK: %d
READ ERROR: %d
listBadByRead
Erase failure: %d
burnNandImg
Nand Img Buffer
Nand Img size in Byte
Abort...
NAND page size = 0x%x
Erase block 8 - 39
Programming done
Successfully wrote %d pages starting at block %d, page %d
  nandFTLL read  <Bl_Start> <Pg> <Pg_Count> <Buf Addr>
      --- Read <Pg_count> pages from NAND to Ram Buf Addr.
  nandFTLL write <Bl_Start> <Pg> <Pg_Count> <Buf Addr>
      --- Write <Pg_count> pages from RAM to NAND.
  nandFTLL erase <Bl_Start> <Bl_Count>
  nandFTLL listBadByRead <BL_Start> <BL_End>
      --- List bad blocks from block <BL_Start> to <BL_End> by Reading it
  nandFTLL burnNandImg <Buf Addr> <Image Size>
      --- Burn CEFDK Nand image from <Buf Addr> to NAND chip with <Image Size> bytes
Successfully read %d pages starting at block %d, page %d
block start: %d, page start: %d, page count: %d
WARNING: This will erae all blocks from %d to %d!
Write error at block %d, page %d
Read error at block %d, page %d
Support 384KB and 512KB CEFDK image size only!
WARNING: This is dangerous, make sure you have correct image load at 0x%X
Press ENTER to continue, others to abort:
Stage1_64K: Program %d pages at block 8
Stage2_128K: Program %d pages at block 16
Stage2_128K: Program %d pages at block 24
Stage2_64K: Program %d pages at block 32
Stage1_128K: Program %d pages at block 8
Stage2_128K: Program %d pages at block 32
Access NAND flash via FTL-Lite API.
Usage:
Boot from flash ...
bootflash
redboot address in NOR
NAND
redboot block address in NAND
FTL Lite initialized failed
  bootflash <NOR> [redboot address in NOR flash] -boot redboot from NOR Flash.
  bootflash <NAND> [redboot blk address in NAND flash] -boot redboot from NAND Flash.
No valid redboot found in flash.
FTL Lite initialized successfully
FTL Lite read Redboot from blk %d fail.
Boot redboot from NOR or NAND flash.
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%d MBytes
%02d
[%s]
%04d
  F1: Save & Exit Setup
  F2: Upgrade Firmware
Data has been updated
Please Restart the system
  Version:     %s
  Build Time:  %s
  Board:       GoldenBeach
  Board:       ChesapeakeBay
  Board:       FalconFalls
  Board:       PowerHouseLake
  MemType:     DDR2
  MemType:     DDR3
  MemSpeed:    800 MHz
  MemSpeed:    1066 MHz
  MemSpeed:    1333 MHz
  MemSpeed:    1600 MHz
  MemSpeed:    Unknown
 Chn Enabled: 
  Chn Mode:    Linear
transfer
addr
length
settings
Standard Features
  Drive Information 
    SATA Primary
    SATA Secondary
  Memory Information 
    Exe MemTest at Start
    Total Ram:
Data has been updated
  Enable BUnit Buffer:
  Enable Security Unit:
  Enable Memory Scrambling:
  Use DRAM Override:
  USB A0 FIB:
  Disable SATA SSC:
  Automatic boot Redboot:
  USBKeyboard Detect:
  Dynamic Rcvn Tuning:
  Dynamic Read Tuning:
  Dynamic Write Tuning:
  Dynamic Write Levelization:
  Fast Audio Path:
BIOS Settings
        CEFDK - Consumer Electronics Firmware Development Kit Setup            
  Esc: Quit                               <Arrow Keys> : Select Item
To begin the upgrade, YMODEM the file .
Transfer has been cancelled, press [esc] to continue.            
Burning the Flash .                                              
Complete.  Please restart your system.                           
                                                              
                            About CEFDK                                        
  Chn Mode:    Interleave Mode 1
  Chn Mode:    Interleave Mode 2
  Esc: Return to Previous Menu                 <--/--> : Tranverse Fields
Usage: Settings - Displays the BIOS Settings of CEFDK.
CEFDK - Consumer Electronics Firmware Development Kit Setup
  Date (mm/dd/yyyy)          /  /
  Time (hh:mm:ss AM/PM)      :  :
         CEFDK - Consumer Electronics Firmware Development Kit Setup           
                       Advanced Features                                       
  Esc: Return to Previous Menu                 <Arror Keys> : Select Item
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Reading boot sector...
done.
Switching to boot loader.
Error: Invalid boot sector.
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Loading 8051 MicroCode at 0x40000
I2C error: Unable to open I2C_BAR1
External PIC version %s
/dev/ttyS0
/dev/ttyS1
I2C error: %s (%d)
[^_]
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counter <= 2
8254.c
Assert failed at %s:%d (%s)
mode <= 5
counterValue <= 0xFFFF
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irq < 16
8259.c
Assert failed at %s:%d (%s)
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map->length + 1 < map->maxDesc
addr_map.c
Assert failed at %s:%d (%s)
map->maxDesc > 0
The blocks reserve for redboot is too large!
INT 13h sub 15h: start logical block 2!
INT 13h sub 15h: end logical block %d!
startSector = %d, sectors = %d
read_dst = %d
pg = %d, offset = %d
blk = %d, off_into_blk = %d
write_src = %d
pg = %d, off_into_page = %d
%02X
Read Fail here!
Write Fail here!!!
Flush_Cache Fail here!!!
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Unhandled real mode interrupt!
EAX = %08x  EBX = %08x  ECX = %08x  EDX = %08x
ESI = %08x  EDI = %08x  EBP = %08x  FLG = %08x
DS  = %04x      ES =  %04x      FS  = %04x      GS  = %04x
Vector: 0x%02X
CS:IP = %04x:%04x
SS:ESP = %04x:%08x
Stack:
   %08x:
 %08x
/dev/tty0
/dev/ttyS0
/dev/ttyS1
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/dev/null
/dev/ttyS0
/dev/ttyS1
/dev/ttyS2
/dev/ttyS3
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Nt&C
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video.c
Assert failed at %s:%d (%s)
col < videoState->numberColumns
3-4.gen4_nand_css.bin

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Unable to Verify stage 3 kernel RSA Signature
Unable to Verify stage 3 RAMdisk RSA Signature
Verify stage 3 pass, try secure boot to Linux from NOR Flash ...
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,:Intel Lincroft SCH Microcode Version 000.064d:00000000:Apr 28 2009
:10:46:28
;ASTEP=def;
LGI_POWER_OVER_RIDE=def;
ENABLE_DDR_RCOMP=def;
USE_DRAM_RDY=def;
CSTATE_TIMINGS=undef;
DPSLP_INVERSION=undef;
LAB_DEBUG_MESSAGES=undef;
ENABLE_DDR_RCOMP=def;
CSTATE_TIMINGS=undef;
CLK_RATIO_12_TO_1=undef;
CEFDK - Production Release %s
  core                      : %s
  cs_gen4                   : %s
  MemType                   : DDR2 
  MemType                   : DDR3 
  MemSpeed                  : 800
  MemSpeed                  : 1066
  MemSpeed                  : 1333
  MemSpeed                  : 1600
  MemSpeed                  : Unknown
  Channels Enabled          : 
  Channel Mode              : 
Hit a key to start the shell...
    fuse_idcode_version[4:0]          -  %04yb
    fuse_sku_id[6:0]                  -  %06yb
    fuse_device_serial_number1[31:0]  -  0x%08X
    fuse_device_serial_number2[31:0]  -  0x%08X
    fuse_ca_vendor_config[15:8]       -  0x%02X
    fuse_ca_vendor_config[7:0]        -  0x%02X
WARNING: The part you are using is UNFUSED and cannot boot!
Please have your Unfused part swapped with a Fused part
by the SDV Boards Ops Team ASAP!
WARNING: Unsupported CPU Frequency strapping %dMhz, using maximum fused CPU Frequency %dMhz
CPU Frequency strapped for %dMhz, LCC fusing limit %dMhz
Attempting to boot Linux from NOR ...
Kernel not found at 0x%X in NOR, continue booting from HD.
Attempting to boot Linux from NAND ...
DENALI_FTL_Page_Read FAIL at 0x%X.
Kernel not found at 0x%X block in NAND, continue booting Linux from HD.
Attempting to boot Linux from HD ...
Kernel not found at 0x%X sector in hard disk, continue booting from flash.
Attempting to boot Redboot from NOR flash ...
Attempting to boot Redboot from NAND flash ...
FTL Lite read Redboot from blk %d fail.
Attempting to boot Redboot from hard disk ...
console=ttyS0,115200 root=/dev/mtdblock2 rw mem=exactmap [email protected] [email protected]
console=ttyS0,115200 root=/dev/sda2 rw mem=exactmap [email protected] [email protected]
Sodaville Stepping: 
Unknown revision
Board:  GoldenBeach: 
Board:  ChesapeakeBay 
Board:  FalconFalls 
Board:  PowerHouseLake 
Version Information - 
Memory configuration - 
 (Safe Settings)
 (Override Settings)
Linear
Interleave Mode 1
Interleave Mode 2
All A/V devices use IRQ 4.
FTL Lite read MAC data fail.
FTL Lite initialized failed
Fuse bits:
Unknown FSB Speed.
Unknown Cacheable memory Size
Shell exit
Please restart the board
Sodaville 2.005
bad reg address
bad dev address
success
not initialized
bad op type
tx empty timeout
rx full timeout
unknown error %d
!!! I2C WR: *%08x=%08x
!!! *retData=0x%x
I2CWaitRxFull
I2CWaitTxEmpty
!!! IN %s: stop=%d ISR=0x%08x mask=%08x rwm=%08x
!!! EXIT(%d) %s: count=%d ISR=0x%08x mask=%08x rwm=%08x
!!! EXIT(%d) %s: count=%d ISR=0x%08x mask=%08x rwm=%08x toTick=%08x%08x roll=%08x%08x procTicks=%08x%08x
!!! IN %s: stop=%d op=%d ISR=0x%08x mask=%08x rwm=%08x
Usage:
i2c 0|1|2 <I2C dev 7bit addr> [<PCI bus> <dev> <fun>]
i2c r[ead] [<bytes> [<dest addr>]] | w[rite] <byte value> [<val2> <val3> ...]]
i2c w 0x4 1 0 0 0xff 0 0 0 0 0 0 0 0
i2c r
Error: First do: %s <bus> <dev addr>
Bad arg.
Usage: i2c r[ead] [<bytes> [<buffer addr>]]
Bad arg.
Usage: i2c w[rite] <byte value> [<val2> <val3> ...]
I2C buses read and write (SV ver).
i2c d[ebug]
 [<debug msg level: 0|1|2>]
Example:
i2c 2 0x44
STATUS:
I2C Bus: %s
%d (0x%x)
I2C Dev: %s
PCI: 0x%x.%x.%x
Bad byte count %d need >0
0x%02x%s
I2C error: %s (%d)
Read %d bytes
I2C DEBUG @ %d
BAR%d:	%08X
ICR_%d		%08X
ISR_%d		%08X
(ISAR_%d		%08X)
IDBR_%d		%08X
(ICCR_%d		%08X)
IBMR_%d		%08X
IWCR_%d		%08X
ISMSCR_%d	%08X
ISMLCR_%d	%08X
IFMSCR_%d	%08X
IFMLCR_%d	%08X
IDDS_RATE_LB%d	%08X
IDDS_RATE_UB%d	%08X
Unknown arg.
Usage:
Boot from flash ...
bootflash
redboot address in NOR
NAND
redboot block address in NAND
FTL Lite initialized failed
  bootflash <NOR> [redboot address in NOR flash] -boot redboot from NOR Flash.
  bootflash <NAND> [redboot blk address in NAND flash] -boot redboot from NAND Flash.
No valid redboot found in flash.
FTL Lite initialized successfully
FTL Lite read Redboot from blk %d fail.
Boot redboot from NOR or NAND flash.
writeCount = 0x%X
Done
Erasing block at 0x%x
Data = 0x%08X
Rounding up copy size to an erase boundary.. Copy Size = 0x%x
Burning the flash using the write buffer
bootkernel
Usage: bootkernel.
Boot Linux kernel from NAND flash block %d...
DENALI_FTL_Page_Read FAIL at 0x%X.
Error booting Linux: Invalid or missing kernel at block 0x%X.
Error booting Linux: Invalid or missing initrd.
Boot Linux kernel from NAND flash.
console=ttyS0,115200 root=/dev/ram0 mem=exactmap [email protected] [email protected]
%d MBytes
%02d
[%s]
%04d
  Cachable Memory size:
  Enable BUnit Buffer:
  Enable Security Unit:
  Enable Memory Scrambling:
  Use DRAM Override:
  USB A0 FIB:
  Disable SATA SSC:
  Automatic boot Redboot:
  USBKeyboard Detect:
  Dynamic Rcvn Tuning:
  Dynamic Read Tuning:
  Dynamic Write Tuning:
  Dynamic Write Levelization:
  F1: Save & Exit Setup
  F2: Upgrade Firmware
Data has been updated
Please Restart the system
(Type   Spd Wd)
(Gb)
(CK)
(ps) 
 (ps) 
  Version:     %s
  Build Time:  %s
  Board:       GoldenBeach
  Board:       ChesapeakeBay
  Board:       FalconFalls
  Board:       PowerHouseLake
  MemType:     DDR2
  MemType:     DDR3
  MemSpeed:    800 MHz
  MemSpeed:    1066 MHz
  MemSpeed:    1333 MHz
  MemSpeed:    1600 MHz
  MemSpeed:    Unknown
 Chn Enabled: 
  Chn Mode:    Linear
transfer
addr
length
settings
Standard Features
  Drive Information 
    SATA Primary
    SATA Secondary
  Memory Information 
    Exe MemTest at Start
    Total Ram:
    Mode:
    CHA Enable:
    CHB Enable:
Data has been updated
BIOS Settings
DDR2 -  800 x8 
DDR2 -  800 x16
DDR3 -  800 x8 
DDR3 -  800 x16
DDR3 - 1066 x8 
DDR3 - 1066 x16
DDR3 - 1333 x8 
DDR3 - 1333 x16
DDR3 - 1600 x8 
DDR3 - 1600 x16
         CEFDK - Consumer Electronics Firmware Development Kit Setup           
                       Advanced Features                                       
  Esc: Return to Previous Menu                 <Arror Keys> : Select Item
        CEFDK - Consumer Electronics Firmware Development Kit Setup            
  Esc: Quit                               <Arrow Keys> : Select Item
To begin the upgrade, YMODEM the file .
Transfer has been cancelled, press [esc] to continue.            
Burning the Flash .                                              
Complete.  Please restart your system.                           
                                                              
                           DRAM Settings                                       
     DRAM       Den   tCL  tRC    tRAS    tWTR   tRRD    tFAW     tRFC 
%s %2d    %2d   %5d  %5d   %5d  %5d   %5d   %6d
  S: Save Entry        D: Restore Default           F: Restore Fail Safe
                            About CEFDK                                        
  Chn Mode:    Interleave Mode 1
  Chn Mode:    Interleave Mode 2
  Esc: Return to Previous Menu                 <--/--> : Tranverse Fields
Usage: Settings - Displays the BIOS Settings of CEFDK.
CEFDK - Consumer Electronics Firmware Development Kit Setup
  Date (mm/dd/yyyy)          /  /
  Time (hh:mm:ss AM/PM)      :  :
mmap
Displays a system memory map.
ata-map
Usage: ata-map none|lba
none
Sets the ATA geometry mapping.
bootata
Attempting ATA boot...
Boots from the primary master ATA device.
Invalid or missing initrd.
mem=
bootlinux
Linux command line = '%s'
Attempting to boot Linux from flash...
Error booting Linux: Invalid or missing kernel at 0x%08X.
Error booting Linux: Invalid or missing initrd.
Boots linux from flash. Usage: bootlinux "<kernel cmd line>"
Error: No room in IRQ table to add entry for device %02x:%02x:%02x
pciIsBridge(bus, dev, func)
pci_alloc.c
Assert failed at %s:%d (%s)
Error: Link %d for PCI device %X:%X:%X exceeds maximum (%d)
Intel(R) Consumer Electronics Firmware Development Kit (Intel(R) CEFDK)
Copyright (C) 1999-2009 Intel Corporation. All rights reserved.
Build Time (%s).
08/27/09 10:29:09
{%x}
exit
help
%10s - %s
reset
shell> 
Error: Missing ".
Error: Invalid command.
Displays this screen.
Stops the shell.
Error: Unable to open redirection file: '%s'.
Invalid %s: '%s'
lspci : displays info about all PCI devices
 -p : pauses after every 25 lines
 -l : list all devices on [bus/buses]
 -s : dump configuration space of [bus [device [function]]] MAXREGOFFSET 
16550-Compatible Serial Controller
Generic PCI Hot-Plug Controller
IPMI Keyboard Controller Interface
Data Acquisition/Signal Processing
BB:DD:FF  VID :DID   DevClass  IRQ  Device Type
--------  ----:----  --------  ---  -------------------------------
===============================================
Bus : %x   Device : %x   Function :  %x
Offset 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
Options:
 -h : prints this message
 -v : verbose mode
IDE Controller
SATA Controller
Mass Storage Controller
Ethernet Controller
VGA-compatible Controller
Display Controller
Video Device
Audio Device
Hi-Definition Audio Device
Multimedia Device
Host-PCI Bridge
PCI-ISA Bridge
PCI-PCI Bridge
PCI-CardBus Bridge
Modem Controller
Smart Card Controller
IO(x) APIC
SDIO Controller
System Peripheral
USB Controller (UHCI)
SMBus Controller
IR Controller
Entertainment Encrypt/Decrypt
Expansion Bus controller
GPIO controller
I2C controller
SPI controller
DFX controller
IEEE1588 and Clock Recovery
NAND controller
GVSPARC
(unknown)
UART Controller
USB Controller (EHCI)
Hit any key to continue ...
%02X:%02X:%02X  
%04X:%04X  
%02X   
Bus .............: %.2x
Device ..........: %.2x
Function ........: %.2x
Vendor ID .......: %.4x
Device ID .......: %.4x
Device Type .....: %s
  Class Code ....: %.2x
  Sub Class .....: %.2x
  Prog I/F ......: %.2x
lspci
    %.2x %.2x 
%.2x 
Hit any key to continue ...
Displays PCI device info.
Usage: ord[2|4] <addr> [[=] <val>]
ord2
ord4
address
value
%02X
%04X
%08X
ord[2|4]
Read or write to memory.
pci2
pci4
device
function
offset
value
%.2x
%.4x
%.8x
pci[2|4]
Usage: pci[2|4] <bus>,<dev>,<func>,<reg> [[=]<val>]
Read or write to PCI configuration space.
port
port2
port4
%.2x
%.4x
%.8x
port[2|4](<addr>) [= <val>]
port[2|4]
Read or write to I/O port.
         port  -- port access size of byte
         port2 -- port access size of word
         port4 -- port access size of double word
ymodem
buffer address
serial port
baud rate
Received 0x%X bytes.
Transfer aborted.
Error during transfer.
usage: ymodem <buf> [<port> [baud rate]]
Received file '%s' (0x%X bytes).
Receive a file from serial using YMODEM.
local apic
(invalid)
reserved
io apic
%d: %016llX-%016llX (%4d%s - %4d%s) %s
Usage: cache on    - Enables L1 and L2 cache.
       cache off   - Disables L1 and L2 cache.
       cache off 1 - Disables L1 cache.
       cache off 2 - Disables L2 cache.
       cache init  - Sets the default caching rules.
       cache flush - Flushes cache (wbinvd).
       cache policy <policy> <base> <end> - Configures caching for an address range.
           <policy>: uc = uncached
                     wc = write combining
Setting default cache rules...
Manipulate the processor cache.
cache
flush
Flushing the caches...
init
Enabling L1 and L2 cache...
policy
base
Configuring cache rules...
error!.
cacheType
Disabling L1 cache...
Disabling L2 cache...
Disabling L1 and L2 cache...
About CEFDK
Standard Features
Advanced Features
DRAM Settings
 96MB 
 128MB
 256MB
 512MB
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 YES  
 NO   
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
 NO   
 YES  
MODE0-NO INTERLEAVING (Need 1 channel at least)
MODE1-INTERLEAVING (Need 2 channels)           
MODE2-INTERLEAVING (Need 2 channels)      
[0;37;0;40m
[00;00H
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Usage: expflash initNor    - Initialize expansion bus for NOR flash access.
       expflash initNand   - Initialize Denali controller for NAND flash access.
       expflash eraseNand  - Erase entire NAND flash.
       expflash readFTLNand <destAddr> <Block> <count> - Reads a block of data from NAND flash starting at block <block> to <destAddr>.
       expflash writeFTLNand <destAddr> <Block> <count> - Writes a block of data from NAND flash starting at block <block> to <destAddr>.
       expflash norRead <address> - Read data from NOR flash.
       expflash norBlockErase <address> - Erases a block, any adress whithin a block will erase that block.
       expflash norWriteBuffer <srcAddress> <desAddress> <size> - Write data from DRAM to NOR flash in buffer mode.
       expflash burnFlash <srcAddress (DRAM)> <destAddress (Flash)> <size> - Erases and burns the proper flash blocks
initFTLNand: Initializing FTL NAND Controller
initFTLNand: DENALI_FTL_Flash_Init() successful
initFTLNand: DENALI_FTL_Flash_Init() failed
initFTLNand: Too few blocks for basic data integrity test. Aborting test
initFTLNand: Too few data blocks for basic data integrity test. Aborting test
initFTLNand: DENALI_FTL_IdentifyDevice() successful
-------------------------------------------------------------
                      Numer of Blocks: %d 
                      Number of pages: %d 
                      Page data size : %d 
                 ECC bytes per Sector: %d 
  Number of Blocks managed by Spectra: %d 
             SizeOfGlobal Memory pool: %d 
                          Start Block: %d 
-------------------------------------------------------------
initFTLNand: DENALI_FTL_IdentifyDevice() failed
Writing %d blocks from 0x%08x to block %d, bpp=%d
Initialize expansion bus for NOR flash access...
Initialize Denali controller for NAND flash access...
Erasing Entire NAND Flash Image...
Access flash on expansion bus.
------------------------
No NAND flash on board!
readFTLNand: Failed
readFTLNand: Successful
writeFTLNand: Failed
writeFTLNand: Successful
expflash
initNor
initNand
eraseNand
writeFTLNand
write address
block start
block count
readFTLNand
read address
norRead
Read data from NOR flash...
norBlockErase
address
Erases a block...
erase done
norWriteBuffer
source address
Destination address
data size
burnFlash
SWVh
[email protected]
tTPh?
t8PhJ
JRPh
Vh(!
------------------------
No NAND flash on board!
Usage:
      --- Erases Blocks.
FTL Lite read fail!
nandFTLL
read
block start
page start
page count
buffer pointer
buf pointer: 0x%08x
erase
block count
Erase block %d - %d
Erase success at block %d
Erase failure at block %d
write
listBadBySig
block end
BAD BLOCK: %d
READ ERROR: %d
listBadByRead
Erase failure: %d
burnNandImg
Nand Img Buffer
Abort...
NAND page size = 0x%x
Erase block 8 - 48
Programming done
Successfully wrote %d pages starting at block %d, page %d
  nandFTLL read  <Bl_Start> <Pg> <Pg_Count> <Buf Addr>
      --- Read <Pg_count> pages from NAND to Ram Buf Addr.
  nandFTLL write <Bl_Start> <Pg> <Pg_Count> <Buf Addr>
      --- Write <Pg_count> pages from RAM to NAND.
  nandFTLL erase <Bl_Start> <Bl_Count>
  nandFTLL listBadBySig <BL_Start> <BL_End>
      --- List bad blocks from block <BL_Start> to <BL_End> by Flag in Spare
  nandFTLL listBadByRead <BL_Start> <BL_End>
      --- List bad blocks from block <BL_Start> to <BL_End> by Reading it
  nandFTLL burnNandImg <Buf Addr>
      --- Burn CEFDK Nand image from <Buf Addr> to NAND chip
Successfully read %d pages starting at block %d, page %d
block start: %d, page start: %d, page count: %d
WARNING: This will erae all blocks from %d to %d!
Write error at block %d, page %d
Read error at block %d, page %d
WARNING: This is dangerous, make sure you have correct image load at 0x%X
Press ENTER to continue, others to abort:
Stage1_64K: Program %d pages at block 8
Stage2_128K: Program %d pages at block 16
Stage2_128K: Program %d pages at block 24
Stage2_64K: Program %d pages at block 32
Access NAND flash via FTL-Lite API.
[^_]
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,[^_]
,[^_]
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[email protected]/
[email protected]
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[email protected]
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Reading boot sector...
done.
Switching to boot loader.
Error: Invalid boot sector.
[email protected]@`
P<gY
sg*|
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L[^_]
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8h( 
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Loading 8051 MicroCode at 0x40000
I2C error: Unable to open I2C_BAR1
External PIC version %s
/dev/ttyS0
/dev/ttyS1
I2C error: %s (%d)
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L[^_]
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,[^_]
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counter <= 2
8254.c
Assert failed at %s:%d (%s)
mode <= 5
counterValue <= 0xFFFF
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irq < 16
8259.c
Assert failed at %s:%d (%s)
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sQ9}
,[^_]
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map->length + 1 < map->maxDesc
addr_map.c
Assert failed at %s:%d (%s)
map->maxDesc > 0
INT 13h sub 15h: start blocks %d!
INT 13h sub 15h: end blocks %d!
startSector = %d, sectors = %d
read_dst = %d
pg = %d, offset = %d
blk = %d, off_into_blk = %d
write_src = %d
pg = %d, off_into_page = %d
%02X
Read Fail here!
Write Fail here!!!
Flush_Cache Fail here!!!
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Unhandled real mode interrupt!
EAX = %08x  EBX = %08x  ECX = %08x  EDX = %08x
ESI = %08x  EDI = %08x  EBP = %08x  FLG = %08x
DS  = %04x      ES =  %04x      FS  = %04x      GS  = %04x
Vector: 0x%02X
CS:IP = %04x:%04x
SS:ESP = %04x:%08x
Stack:
   %08x:
 %08x
/dev/tty0
/dev/ttyS0
/dev/ttyS1
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/dev/null
/dev/ttyS0
/dev/ttyS1
/dev/ttyS2
/dev/ttyS3
Nt,C
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Nt&C
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/dev/null
/dev/tty
VUUU
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F6< t
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SATA %d: 
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d D 
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gfff
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gfff
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WVS1
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T[^_]
D[^_]
@[^_]
@[^_]
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,[^_]
4[^_]
<[^_]
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[email protected]
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,X<!w
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gfff
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gfffO
0123456789ABCDEF 
0123456789ABCDEF
@f]fXf
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Z[^_]
Y[^_]
/dev/tty
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,[^_]
ttF1
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[^_]
row < NUMBER_ROWS
video.c
Assert failed at %s:%d (%s)
col < videoState->numberColumns
gfff
[^_]
YXhp
XZhp

nikescar
Android 1.0
Posts: 11
Joined: Tue Jan 17, 2012 12:53 pm
GTV Device Owned: Logitech Revue

Re: Noticible information among bootloaders

Post by nikescar » Fri Mar 09, 2012 4:30 am

Boxeebox
Please restart the board
CE4100 4.020-DSM380 v1.8.0

gen4.bin
Please restart the board
CE4100 4.018

gen4_css.bin
Please restart the board
Sodaville 2.005

gen4_nand.bin
Please restart the board
CE4100 4.018

gen4_nand_css.bin
Please restart the board
Sodaville 2.005

Scoubidou
Android 1.0
Posts: 1
Joined: Wed Mar 21, 2018 7:39 am

Re: Any Hope of ever modding?

Post by Scoubidou » Wed Mar 21, 2018 7:43 am

Hi, any progress here ? Could someone re-up http://www.2shared.com/file/fN_xusWK/ce ... 610161.htm ?

Thanks

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